I am quality driven and have been working for the last decade on low power optimizations and Clock Domain Crossing (CDC) methodologies. I have a Master`s in EE from the Technion Israel Institute of technology where I spent most of my time working on ML frameworks. Besides ASIC design, I enjoy tinkering with GPUs, MCUs, and CI/CD flows for EDA. ©

I`m probably writing a new song, reading a book or coding. ©