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EDUCATION: I have finished my Master’s Degree in Computer Engineering. Total GPA: 17.8/20 SOFTWARE: • Windows NT, Linux • C/C++ , Python, QT, C#, QML, VHDL, android • MySQL, ElK • git, svn • Socket Programming, Multi-Processing, parallel processing, multi-threading • Visual Studio, Pycharm, QT creator, MATLAB, Clione, Xilinx ISE, Xilinx vivado , model sim, Microsoft office WORK EXPERIENCE: (SOFTWARE DEVELOPER) • Working as a full time C/C++, Python, Qt Software developer. • Experience of full life cycle including planning and assessment, requirements definition, features and functionality design and development, coding, testing, implementation, product and infrastructure enhancement and maintenance. • An expert in Object Oriented Programming (OOP) concepts (such as objects, classes, abstraction, polymorphism, exception handling). • Working with variety of C/C++ libraries and Python Packages such as Audio Port, MKL, IPP and Numpy, Matplotlib, ZMQ. • Familiar with source controllers like GIT and SVN. • Controlling the rotation of Reflector Antenna by serial port. • Controlling the setting of Tuner in the range of 20-3000 MHz by using Ethernet (employing win socket library). • Developing testable functions and classes (Google-Test library). • Working with MFC-based application. • Implement algorithms to Real-time signal processing. • Knowledge of advanced level programming in C/C++ and Python including multi-threading, Agents, memory management and concurrency. • Socket Programming. • User Interface design by pyqt graph. • Developing testable functions and classes (Python test). • Implementation of data base with Mysql and ELK. • Detection of signal modulation with machine learning algorithms by python. • Conversion of algorithms from Matlab to C/C++ and Python. • Implementation of multi-platform application. • Implementation of Multi-processing and multi-threading algorithms. • Implementation of algorithms by Matlab. • Implementation of software on raspberry pi. • Implementation of dashboard by Qlikview. (VHDL DESIGNER) • Proficient in FPGA implementation with Xilinx. • Proficient in fully structural and synthesizable HDL description by Xilinx tools such as Xilinx ISE and VIVADO. • Proficient in using smart Explorer tools in Xilinx in order to synthesize, map, route and overcoming some time-closures (Like timing slacks) for large scale circuits on FPGA. • Proficient in use of Matlab System generator for HDL description. (LABORATORY SKILLS) • Electronic boards (FPGA) • Vector Signal Generators (Rohde and Schwarz signal generator) • Digital Oscilloscopes • Spectrum Analyzers PUBLICATIONS MAY 2015 S. SEYED JAFAR KASHI, N. MAHJOOB, S. JAMALI, “OPTIMIZATION OF ENERGY CONSUMPTION IN PASSIVE OPTICAL NETWORKS” 7th International Conference on Information and Knowledge Technology. Conference ©

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