I have PhD. from FIIT STU, Bratislava (computer science - machine learning). I am author of the R package . My current interests include: Data Mining Machine Learning Cluster Analysis Data Streams Time Series Forecasting You can read more about it on my . ©

About Me My interest in programming began in middle school when I took a two day class on Visual Basics. From then on, I used Visual Basics for Applications (VBA) to automate repeatable tasks in Excel and Access anytime I felt it would make my tasks more efficient. I attended devCodeCamp to expand my knowledge base from small basic `tools` to more advanced applications so I could solve bigger problems, streamline processes, and ultimately help make people’s work life easier. In my previous job as a Workforce and Workflow Manager at Duncan Solutions, I utilized VBA, Excel and Access to make over 10 applications. These applications contributed to a better overall workflow for employees in areas such as capturing, reporting and processing of data. Most notably, the quality assurance system for completing audits of representatives phone calls and outbound correspondence. This was achieved by moving from Excel spreadsheets to an Access database with VBA code to automate tasks such as data entry, emailing completed audits, and enhanced reporting. What I Bring I bring with me practical experience enhanced now with the knowledge and skills gained from the immersive course work devCodeCamp provided. I gained advanced SQL querying, requirements gathering and project management, and honed my analytical and problem-solving skills during my experiences within the operations department of Duncan Solutions. I have always subscribed to the philosophy that everyone is my customer and deserves the best service I can provide – from my team mates, management and vendors as internal customers, to clients of the company, they all deserve timely responses, clear communication, and nothing but my best every time. Development Strengths I am a quick learner, picking up new ideas and skills quickly. A previous manager once described me as the best YouTube “figure-outer” in the company. Additionally, I am able to understand the big picture without losing sight of the details. I accomplish this by analyzing the landscape, processing quickly what needs to be done, and then carrying it out methodically to ensure nothing is missed. I am always excited to learn new and different ways of solving a problem, including learning different technologies that can be better applied to the current situation. ©

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Technology interface to GLOBALFOUNDRIES (65G), TSMC (65LP, 40LP). Analog ESD protection development for TSMC 40LP technology. Foundry PCM data analysis. Understanding switching converter topologies and digital control systems. High experience with layout design and optimization, process flow. Simulation experience with HSPICE, TCAD tools and environments, Unix design systems experience. Design and develop RFICs in BiCMOS or sub-micron IC CMOS technology, identifying and analyzing performance requirements and implementing robust, manufacturable designs with best-in-class performance. Good working knowledge of advanced CMOS and RF wafer processing technologies and process interactions that affect device yields, including Systems on Chip (SoC) with Dual Gate Oxide (DGO). Experience in ASIC design, clock/power distribution and analysis, RC extraction, timing analysis. Experience with full-custom IC layout Experience in IC layout verification (DRC) Skilled in use of EDA tools for MEMS/NEMS design and analysis. Skilled in Design and manufacturing MOS Gated Power Devices. Skilled in Carrier Lifetime Measurements, CV Measurements, Chip reliability test. Skilled in STI isolation, Trench refill, Chemical Mechanical Planarization processes. Implemented Projects: Detectors Design and manufacturing: Humidity Sensor (Integrated Capacitor), Pressure Sensor (Bulk Silicon orientation (110) Trench Gate with Carrier Storage (CS) layer IGBT simulation and optimization. ChemFET and enzyme - protein sensitive FET research. Design and manufacturing BIB (Blocked Impurity Band) Photodetector for the 12-16 micron wavelength, 64x64 array, flip chip mounting with multiplexor, cooled T=10 K. Design and manufacturing 64 cells microbolometer linear array. Simulation, design, manufacturing and testing MOS controlled thyristor (2500V, 50 A) Simulation, design, manufacturing and testing Press Pack HV-IGBT (4500V, 40 –1000A) Simulation, design and manufacturing Solar Cells made with multisilicon wafers, 11.5% efficiency Avalanche Photodiode simulation (3D Single Event Upset), design and manufacturing. Avalanche photodiode array LIDAR application design and manufacturing. Quadrant PIN photodiodes design and manufacturing, 1064 nm wavelength. Position sensitive PIN photodiode design and manufacturing. Semiconductor device models implemented with VHDL simulator Simulation and design submicron SOI MOSFET Design and manufacture SJ MOSFET Devices (CoolMOS), special development – SJ MOSFET Avalanche Ruggedness, various die edge termination structures. Design and manufacture Junction Termination Extension Variation Lateral Doping (JTE VLD), own theoretical results in design optimization ©

BY DAY: I research on a topic, or enjoy if there is a holiday BY NIGHT: I think free,affordable,DIY ideas alternative to commercial technologies and education FOR FUN: Read programming jokes, read a advance programming book Action speaks louder than words ©

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