Hi! My name is Hakan and I am working as a Verification Engineer in ASELSAN which is the one of the leading and biggest company in Turkey. I am trying to complete my thesis about UVM. I am highly interested in verification and related things such as VHDL, SystemVerilog, UVM, Linux, Script Language, Python. I am trying to find answers of my question on this forum and I save them to see later.
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